A modern System-on-a Chip (SOC), such as the Broadcom BCM1125H, include a CPU, memory controller, data mover, and other components that were previously implemented as separate devices and interconnected on printed circuit boards. While SOCs provide many advantages, they also make debugging certain error conditions difficult.
One example of an error condition is a non-responsive peripheral device that causes the CPU to hang up waiting for a response. Many systems use a watchdog timer to guard against bad devices hanging up the CPU and against other error conditions. If a device does not respond within a time-out period the watchdog timer resets the CPU and, after reset, a diagnostic routine, such as a bootstrap handler, diagnoses the problem, fetching the address of the failed peripheral device from the memory controller. With an SOC, such as the Broadcom chip, the watchdog timer resets the entire SOC, including the memory controller, making debugging very difficult since address information of the bad device has been lost.
The challenges in the field of debugging and error recovery continue to increase with demands for more and better techniques having greater flexibility and adaptability. Therefore, a need has arisen for a new system and method for debugging and error recovery in an SOC.
In accordance with the present invention, a system and method for debugging and error recovery for use with an SOC is provided that addresses disadvantages and problems associated with previously developed systems and methods.